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Update missing changes for 3.0.9r4.

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This commit is contained in:
Anthony Green
2009-12-24 00:22:00 -05:00
parent f8c7a245bf
commit 115ab36fce
88 changed files with 19142 additions and 22010 deletions
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76
src/powerpc/.svn/entries
View File

@@ -1,15 +1,15 @@
10
dir
152280
svn://gcc.gnu.org/svn/gcc/trunk/libffi/src/powerpc
svn://gcc.gnu.org/svn/gcc
155449
svn+ssh://green@gcc.gnu.org/svn/gcc/trunk/libffi/src/powerpc
svn+ssh://green@gcc.gnu.org/svn/gcc
2009-06-16T17:55:39.375944Z
148543
andreast
2009-12-08T00:41:10.883117Z
155070
dje
@@ -32,7 +32,7 @@ file
2009-06-10T05:25:00.000000Z
2009-12-20T06:01:53.728555Z
688696f2414aa7866b7c92c8684718d4
2009-06-04T15:43:03.499507Z
148172
@@ -66,7 +66,7 @@ file
2009-04-24T17:46:15.000000Z
2009-12-20T06:01:53.729555Z
31cb78f1f10503180bd8dc1ea0076ad1
2005-03-24T00:45:38.000000Z
96967
@@ -100,11 +100,11 @@ file
2009-06-10T05:25:00.000000Z
b12a0e2e6ad83a41d1e1dd9eecb4141f
2009-06-04T15:11:12.475454Z
148171
aph
2009-12-20T06:01:53.729555Z
c07a6ebc629ba19daac8e64861b671e8
2009-11-30T23:34:33.372904Z
154855
dje
@@ -126,7 +126,7 @@ aph
3517
3697
aix.S
file
@@ -134,11 +134,11 @@ file
2009-04-24T17:46:15.000000Z
d23701ff3a05628dde1d8c18d2911662
2004-09-02T21:07:21.000000Z
86991
andreast
2009-12-20T06:01:53.729555Z
60858f5d753b23d596681fe4550557da
2009-12-05T21:48:58.742742Z
155016
dje
@@ -160,7 +160,7 @@ andreast
4763
6635
darwin.S
file
@@ -168,7 +168,7 @@ file
2009-04-24T17:46:15.000000Z
2009-12-20T06:01:53.729555Z
24ade1d97acb5fb9f4033f7266b5cede
2005-03-24T00:45:38.000000Z
96967
@@ -202,7 +202,7 @@ file
2009-06-20T15:53:35.000000Z
2009-12-20T06:01:53.730558Z
5e33e72fe5ecabf0a89cf4d5227cb1ca
2009-06-16T17:55:39.375944Z
148543
@@ -236,7 +236,7 @@ file
2009-06-20T15:53:35.000000Z
2009-12-20T06:01:53.730558Z
53da07be3982ee6cf80c7938c77e8ef7
2009-06-16T17:55:39.375944Z
148543
@@ -270,7 +270,7 @@ file
2009-04-24T17:46:15.000000Z
2009-12-20T06:01:53.730558Z
41549f68aeedd29e849159d4567ede07
2004-09-02T21:07:21.000000Z
86991
@@ -304,7 +304,7 @@ file
2009-06-10T05:25:00.000000Z
2009-12-20T06:01:53.730558Z
6fcea235a139c24a1ce2f1648875b50e
2009-06-04T15:43:03.499507Z
148172
@@ -338,11 +338,11 @@ file
2009-06-10T05:25:00.000000Z
99c864cc939078110592da3cedda290f
2009-06-04T15:43:03.499507Z
148172
aph
2009-12-20T06:01:53.730558Z
060e5d94c60a73470ae84eefddd59be0
2009-12-04T15:36:50.057287Z
154983
dje
@@ -364,7 +364,7 @@ aph
23367
24973
linux64.S
file
@@ -372,7 +372,7 @@ file
2009-06-10T05:25:00.000000Z
2009-12-20T06:01:53.731563Z
a7d09aad6ca2eb4358d7ad4bca4fdd7e
2009-06-04T15:43:03.499507Z
148172
@@ -406,11 +406,11 @@ file
2009-04-24T17:46:15.000000Z
049e042e968b560f48689cfc881d2db6
2004-09-02T21:07:21.000000Z
86991
andreast
2009-12-20T06:01:53.731563Z
8207431267046ac40ba651b36022b895
2009-12-08T00:41:10.883117Z
155070
dje
@@ -432,5 +432,5 @@ andreast
5613
8985

229
src/powerpc/.svn/text-base/aix.S.svn-base
View File

@@ -1,5 +1,5 @@
/* -----------------------------------------------------------------------
aix.S - Copyright (c) 2002 Free Software Foundation, Inc.
aix.S - Copyright (c) 2002,2009 Free Software Foundation, Inc.
based on darwin.S by John Hornkvist
PowerPC Assembly glue.
@@ -86,9 +86,13 @@
#define L(x) x
.file "aix.S"
.toc
.csect .text[PR]
.align 2
.globl ffi_prep_args
/* void ffi_call_AIX(extended_cif *ecif, unsigned long bytes,
* unsigned int flags, unsigned int *rvalue,
* void (*fn)(),
* void (*prep_args)(extended_cif*, unsigned *const));
* r3=ecif, r4=bytes, r5=flags, r6=rvalue, r7=fn, r8=prep_args
*/
.csect .text[PR]
.align 2
@@ -96,61 +100,151 @@
.globl .ffi_call_AIX
.csect ffi_call_AIX[DS]
ffi_call_AIX:
#ifdef __64BIT__
.llong .ffi_call_AIX, TOC[tc0], 0
.csect .text[PR]
.ffi_call_AIX:
/* Save registers we use. */
mflr r0
std r28,-32(r1)
std r29,-24(r1)
std r30,-16(r1)
std r31, -8(r1)
std r0, 16(r1)
mr r28, r1 /* our AP. */
stdux r1, r1, r4
/* Save arguments over call... */
mr r31, r5 /* flags, */
mr r30, r6 /* rvalue, */
mr r29, r7 /* function address. */
std r2, 40(r1)
/* Call ffi_prep_args. */
mr r4, r1
bl .ffi_prep_args
/* Now do the call. */
ld r0, 0(r29)
ld r2, 8(r29)
ld r11, 16(r29)
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40, r31
mtctr r0
/* Load all those argument registers. */
// We have set up a nice stack frame, just load it into registers.
ld r3, 40+(1*8)(r1)
ld r4, 40+(2*8)(r1)
ld r5, 40+(3*8)(r1)
ld r6, 40+(4*8)(r1)
nop
ld r7, 40+(5*8)(r1)
ld r8, 40+(6*8)(r1)
ld r9, 40+(7*8)(r1)
ld r10,40+(8*8)(r1)
L1:
/* Load all the FP registers. */
bf 6,L2 // 2f + 0x18
lfd f1,-32-(13*8)(r28)
lfd f2,-32-(12*8)(r28)
lfd f3,-32-(11*8)(r28)
lfd f4,-32-(10*8)(r28)
nop
lfd f5,-32-(9*8)(r28)
lfd f6,-32-(8*8)(r28)
lfd f7,-32-(7*8)(r28)
lfd f8,-32-(6*8)(r28)
nop
lfd f9,-32-(5*8)(r28)
lfd f10,-32-(4*8)(r28)
lfd f11,-32-(3*8)(r28)
lfd f12,-32-(2*8)(r28)
nop
lfd f13,-32-(1*8)(r28)
L2:
/* Make the call. */
bctrl
ld r2, 40(r1)
/* Now, deal with the return value. */
mtcrf 0x01, r31
bt 30, L(done_return_value)
bt 29, L(fp_return_value)
std r3, 0(r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
mr r1, r28
ld r0, 16(r28)
ld r28, -32(r1)
mtlr r0
ld r29, -24(r1)
ld r30, -16(r1)
ld r31, -8(r1)
blr
L(fp_return_value):
bf 28, L(float_return_value)
stfd f1, 0(r30)
bf 31, L(done_return_value)
stfd f2, 8(r30)
b L(done_return_value)
L(float_return_value):
stfs f1, 0(r30)
b L(done_return_value)
#else /* ! __64BIT__ */
.long .ffi_call_AIX, TOC[tc0], 0
.csect .text[PR]
.ffi_call_AIX:
mr r12,r8 // We only need r12 until the call, so it doesn't have to be saved...
/* Save the old stack pointer as AP. */
mr r8,r1
/* Allocate the stack space we need. */
stwux r1,r1,r4
/* Save registers we use. */
mflr r9
mflr r0
stw r28,-16(r8)
stw r29,-12(r8)
stw r30, -8(r8)
stw r31, -4(r8)
stw r28,-16(r1)
stw r29,-12(r1)
stw r30, -8(r1)
stw r31, -4(r1)
stw r9, 8(r8)
stw r2, 20(r1)
stw r0, 8(r1)
mr r28, r1 /* out AP. */
stwux r1, r1, r4
/* Save arguments over call... */
mr r31,r5 /* flags, */
mr r30,r6 /* rvalue, */
mr r29,r7 /* function address, */
mr r28,r8 /* our AP. */
mr r31, r5 /* flags, */
mr r30, r6 /* rvalue, */
mr r29, r7 /* function address, */
stw r2, 20(r1)
/* Call ffi_prep_args. */
mr r4,r1
li r9,0
lwz r2,4(r12)
lwz r12,0(r12)
mtctr r12 // r12 holds address of _ffi_prep_args
bctrl
lwz r2,20(r1)
mr r4, r1
bl .ffi_prep_args
/* Now do the call. */
lwz r12,0(r29)
lwz r0, 0(r29)
lwz r2, 4(r29)
lwz r11, 8(r29)
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40,r31
stw r2,20(r1)
mtctr r12
lwz r2,4(r29)
mtcrf 0x40, r31
mtctr r0
/* Load all those argument registers. */
// We have set up a nice stack frame, just load it into registers.
lwz r3, 20+(1*4)(r1)
lwz r4, 20+(2*4)(r1)
lwz r5, 20+(3*4)(r1)
lwz r6, 20+(4*4)(r1)
lwz r3, 20+(1*4)(r1)
lwz r4, 20+(2*4)(r1)
lwz r5, 20+(3*4)(r1)
lwz r6, 20+(4*4)(r1)
nop
lwz r7, 20+(5*4)(r1)
lwz r8, 20+(6*4)(r1)
lwz r9, 20+(7*4)(r1)
lwz r10,20+(8*4)(r1)
lwz r7, 20+(5*4)(r1)
lwz r8, 20+(6*4)(r1)
lwz r9, 20+(7*4)(r1)
lwz r10,20+(8*4)(r1)
L1:
/* Load all the FP registers. */
@@ -165,47 +259,48 @@ L1:
lfd f7,-16-(7*8)(r28)
lfd f8,-16-(6*8)(r28)
nop
lfd f9,-16-(5*8)(r28)
lfd f10,-16-(4*8)(r28)
lfd f11,-16-(3*8)(r28)
lfd f12,-16-(2*8)(r28)
lfd f9,-16-(5*8)(r28)
lfd f10,-16-(4*8)(r28)
lfd f11,-16-(3*8)(r28)
lfd f12,-16-(2*8)(r28)
nop
lfd f13,-16-(1*8)(r28)
lfd f13,-16-(1*8)(r28)
L2:
/* Make the call. */
bctrl
lwz r2,20(r1)
lwz r2, 20(r1)
/* Now, deal with the return value. */
mtcrf 0x01,r31
mtcrf 0x01, r31
bt 30,L(done_return_value)
bt 29,L(fp_return_value)
stw r3,0(r30)
bf 28,L(done_return_value)
stw r4,4(r30)
bt 30, L(done_return_value)
bt 29, L(fp_return_value)
stw r3, 0(r30)
bf 28, L(done_return_value)
stw r4, 4(r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
lwz r9, 8(r28)
lwz r31, -4(r28)
mtlr r9
lwz r30, -8(r28)
lwz r29,-12(r28)
lwz r28,-16(r28)
lwz r1,0(r1)
mr r1, r28
lwz r0, 8(r28)
lwz r28,-16(r1)
mtlr r0
lwz r29,-12(r1)
lwz r30, -8(r1)
lwz r31, -4(r1)
blr
L(fp_return_value):
bf 28,L(float_return_value)
stfd f1,0(r30)
bf 28, L(float_return_value)
stfd f1, 0(r30)
b L(done_return_value)
L(float_return_value):
stfs f1,0(r30)
stfs f1, 0(r30)
b L(done_return_value)
#endif
.long 0
.byte 0,0,0,1,128,4,0,0
//END(ffi_call_AIX)
@@ -216,7 +311,11 @@ L(float_return_value):
.globl .ffi_call_DARWIN
.csect ffi_call_DARWIN[DS]
ffi_call_DARWIN:
#ifdef __64BIT__
.llong .ffi_call_DARWIN, TOC[tc0], 0
#else
.long .ffi_call_DARWIN, TOC[tc0], 0
#endif
.csect .text[PR]
.ffi_call_DARWIN:
blr

426
src/powerpc/.svn/text-base/aix_closure.S.svn-base
View File

@@ -1,5 +1,5 @@
/* -----------------------------------------------------------------------
aix_closure.S - Copyright (c) 2002 2003 Free Software Foundation, Inc.
aix_closure.S - Copyright (c) 2002, 2003, 2009 Free Software Foundation, Inc.
based on darwin_closure.S
PowerPC Assembly glue.
@@ -94,65 +94,66 @@ LC..60:
.globl ffi_closure_ASM
.globl .ffi_closure_ASM
.csect ffi_closure_ASM[DS]
ffi_closure_ASM:
.long .ffi_closure_ASM, TOC[tc0], 0
#ifdef __64BIT__
.llong .ffi_closure_ASM, TOC[tc0], 0
.csect .text[PR]
.ffi_closure_ASM:
mflr r0 /* extract return address */
stw r0, 8(r1) /* save the return address */
/* 24 Bytes (Linkage Area) */
/* 32 Bytes (params) */
/* 104 Bytes (13*8 from FPR) */
/* 8 Bytes (result) */
/* 168 Bytes */
stwu r1,-176(r1) /* skip over caller save area
keep stack aligned to 16 */
/* we want to build up an area for the parameters passed */
/* in registers (both floating point and integer) */
/* we store gpr 3 to gpr 10 (aligned to 4)
in the parents outgoing area */
stw r3, 200(r1)
stw r4, 204(r1)
stw r5, 208(r1)
stw r6, 212(r1)
stw r7, 216(r1)
stw r8, 220(r1)
stw r9, 224(r1)
stw r10, 228(r1)
std r3, 48+(0*8)(r1)
std r4, 48+(1*8)(r1)
std r5, 48+(2*8)(r1)
std r6, 48+(3*8)(r1)
mflr r0
std r7, 48+(4*8)(r1)
std r8, 48+(5*8)(r1)
std r9, 48+(6*8)(r1)
std r10, 48+(7*8)(r1)
std r0, 16(r1) /* save the return address */
/* 48 Bytes (Linkage Area) */
/* 64 Bytes (params) */
/* 16 Bytes (result) */
/* 104 Bytes (13*8 from FPR) */
/* 8 Bytes (alignment) */
/* 240 Bytes */
stdu r1, -240(r1) /* skip over caller save area
keep stack aligned to 16 */
/* next save fpr 1 to fpr 13 (aligned to 8) */
stfd f1, 56(r1)
stfd f2, 64(r1)
stfd f3, 72(r1)
stfd f4, 80(r1)
stfd f5, 88(r1)
stfd f6, 96(r1)
stfd f7, 104(r1)
stfd f8, 112(r1)
stfd f9, 120(r1)
stfd f10, 128(r1)
stfd f11, 136(r1)
stfd f12, 144(r1)
stfd f13, 152(r1)
stfd f1, 128+(0*8)(r1)
stfd f2, 128+(1*8)(r1)
stfd f3, 128+(2*8)(r1)
stfd f4, 128+(3*8)(r1)
stfd f5, 128+(4*8)(r1)
stfd f6, 128+(5*8)(r1)
stfd f7, 128+(6*8)(r1)
stfd f8, 128+(7*8)(r1)
stfd f9, 128+(8*8)(r1)
stfd f10, 128+(9*8)(r1)
stfd f11, 128+(10*8)(r1)
stfd f12, 128+(11*8)(r1)
stfd f13, 128+(12*8)(r1)
/* set up registers for the routine that actually does the work */
/* get the context pointer from the trampoline */
mr r3,r11
mr r3, r11
/* now load up the pointer to the result storage */
addi r4,r1,160
addi r4, r1, 112
/* now load up the pointer to the saved gpr registers */
addi r5,r1,200
addi r5, r1, 288
/* now load up the pointer to the saved fpr registers */
addi r6,r1,56
addi r6, r1, 128
/* make the call */
bl .ffi_closure_helper_DARWIN
@@ -164,84 +165,279 @@ ffi_closure_ASM:
/* look up the proper starting point in table */
/* by using return type as offset */
addi r5,r1,160 /* get pointer to results area */
lwz r4,LC..60(2) /* get address of jump table */
slwi r3,r3,2 /* now multiply return type by 4 */
lwzx r3,r4,r3 /* get the contents of that table value */
add r3,r3,r4 /* add contents of table to table address */
mtctr r3
ld r4, LC..60(2) /* get address of jump table */
sldi r3, r3, 4 /* now multiply return type by 16 */
ld r0, 240+16(r1) /* load return address */
add r3, r3, r4 /* add contents of table to table address */
mtctr r3
bctr /* jump to it */
/* Each fragment must be exactly 16 bytes long (4 instructions).
Align to 16 byte boundary for cache and dispatch efficiency. */
.align 4
L..60:
.long L..44-L..60 /* FFI_TYPE_VOID */
.long L..50-L..60 /* FFI_TYPE_INT */
.long L..47-L..60 /* FFI_TYPE_FLOAT */
.long L..46-L..60 /* FFI_TYPE_DOUBLE */
.long L..46-L..60 /* FFI_TYPE_LONGDOUBLE */
.long L..56-L..60 /* FFI_TYPE_UINT8 */
.long L..55-L..60 /* FFI_TYPE_SINT8 */
.long L..58-L..60 /* FFI_TYPE_UINT16 */
.long L..57-L..60 /* FFI_TYPE_SINT16 */
.long L..50-L..60 /* FFI_TYPE_UINT32 */
.long L..50-L..60 /* FFI_TYPE_SINT32 */
.long L..48-L..60 /* FFI_TYPE_UINT64 */
.long L..48-L..60 /* FFI_TYPE_SINT64 */
.long L..44-L..60 /* FFI_TYPE_STRUCT */
.long L..50-L..60 /* FFI_TYPE_POINTER */
/* case FFI_TYPE_VOID */
mtlr r0
addi r1, r1, 240
blr
nop
/* case double */
L..46:
lfd f1,0(r5)
b L..44
/* case float */
L..47:
lfs f1,0(r5)
b L..44
/* case long long */
L..48:
lwz r3,0(r5)
lwz r4,4(r5)
b L..44
/* case default / int32 / pointer */
L..50:
lwz r3,0(r5)
b L..44
/* case signed int8 */
L..55:
addi r5,r5,3
lbz r3,0(r5)
slwi r3,r3,24
srawi r3,r3,24
b L..44
/* case unsigned int8 */
L..56:
addi r5,r5,3
lbz r3,0(r5)
b L..44
/* case signed int16 */
L..57:
addi r5,r5,2
lhz r3,0(r5)
extsh r3,r3
b L..44
/* case unsigned int16 */
L..58:
addi r5,r5,2
lhz r3,0(r5)
/* case void / done */
L..44:
addi r1,r1,176 /* restore stack pointer */
lwz r0,8(r1) /* get return address */
mtlr r0 /* reset link register */
/* case FFI_TYPE_INT */
lwa r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_FLOAT */
lfs f1, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_DOUBLE */
lfd f1, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_LONGDOUBLE */
lfd f1, 112+0(r1)
mtlr r0
lfd f2, 112+8(r1)
b L..finish
/* case FFI_TYPE_UINT8 */
lbz r3, 112+7(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT8 */
lbz r3, 112+7(r1)
mtlr r0
extsb r3, r3
b L..finish
/* case FFI_TYPE_UINT16 */
lhz r3, 112+6(r1)
mtlr r0
L..finish:
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT16 */
lha r3, 112+6(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_UINT32 */
lwz r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT32 */
lwa r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_UINT64 */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT64 */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_STRUCT */
mtlr r0
addi r1, r1, 240
blr
nop
/* case FFI_TYPE_POINTER */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
#else /* ! __64BIT__ */
.long .ffi_closure_ASM, TOC[tc0], 0
.csect .text[PR]
.ffi_closure_ASM:
/* we want to build up an area for the parameters passed */
/* in registers (both floating point and integer) */
/* we store gpr 3 to gpr 10 (aligned to 4)
in the parents outgoing area */
stw r3, 24+(0*4)(r1)
stw r4, 24+(1*4)(r1)
stw r5, 24+(2*4)(r1)
stw r6, 24+(3*4)(r1)
mflr r0
stw r7, 24+(4*4)(r1)
stw r8, 24+(5*4)(r1)
stw r9, 24+(6*4)(r1)
stw r10, 24+(7*4)(r1)
stw r0, 8(r1)
/* 24 Bytes (Linkage Area) */
/* 32 Bytes (params) */
/* 16 Bytes (result) */
/* 104 Bytes (13*8 from FPR) */
/* 176 Bytes */
stwu r1, -176(r1) /* skip over caller save area
keep stack aligned to 16 */
/* next save fpr 1 to fpr 13 (aligned to 8) */
stfd f1, 72+(0*8)(r1)
stfd f2, 72+(1*8)(r1)
stfd f3, 72+(2*8)(r1)
stfd f4, 72+(3*8)(r1)
stfd f5, 72+(4*8)(r1)
stfd f6, 72+(5*8)(r1)
stfd f7, 72+(6*8)(r1)
stfd f8, 72+(7*8)(r1)
stfd f9, 72+(8*8)(r1)
stfd f10, 72+(9*8)(r1)
stfd f11, 72+(10*8)(r1)
stfd f12, 72+(11*8)(r1)
stfd f13, 72+(12*8)(r1)
/* set up registers for the routine that actually does the work */
/* get the context pointer from the trampoline */
mr r3, r11
/* now load up the pointer to the result storage */
addi r4, r1, 56
/* now load up the pointer to the saved gpr registers */
addi r5, r1, 200
/* now load up the pointer to the saved fpr registers */
addi r6, r1, 72
/* make the call */
bl .ffi_closure_helper_DARWIN
nop
/* now r3 contains the return type */
/* so use it to look up in a table */
/* so we know how to deal with each type */
/* look up the proper starting point in table */
/* by using return type as offset */
lwz r4, LC..60(2) /* get address of jump table */
slwi r3, r3, 4 /* now multiply return type by 4 */
lwz r0, 176+8(r1) /* load return address */
add r3, r3, r4 /* add contents of table to table address */
mtctr r3
bctr /* jump to it */
/* Each fragment must be exactly 16 bytes long (4 instructions).
Align to 16 byte boundary for cache and dispatch efficiency. */
.align 4
L..60:
/* case FFI_TYPE_VOID */
mtlr r0
addi r1, r1, 176
blr
nop
/* case FFI_TYPE_INT */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_FLOAT */
lfs f1, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_DOUBLE */
lfd f1, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_LONGDOUBLE */
lfd f1, 56+0(r1)
mtlr r0
lfd f2, 56+8(r1)
b L..finish
/* case FFI_TYPE_UINT8 */
lbz r3, 56+3(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT8 */
lbz r3, 56+3(r1)
mtlr r0
extsb r3, r3
b L..finish
/* case FFI_TYPE_UINT16 */
lhz r3, 56+2(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT16 */
lha r3, 56+2(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_UINT32 */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT32 */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_UINT64 */
lwz r3, 56+0(r1)
mtlr r0
lwz r4, 56+4(r1)
b L..finish
/* case FFI_TYPE_SINT64 */
lwz r3, 56+0(r1)
mtlr r0
lwz r4, 56+4(r1)
b L..finish
/* case FFI_TYPE_STRUCT */
mtlr r0
addi r1, r1, 176
blr
nop
/* case FFI_TYPE_POINTER */
lwz r3, 56+0(r1)
mtlr r0
L..finish:
addi r1, r1, 176
blr
#endif
/* END(ffi_closure_ASM) */

219
src/powerpc/.svn/text-base/ffi_darwin.c.svn-base
View File

@@ -3,7 +3,7 @@
Copyright (C) 1998 Geoffrey Keating
Copyright (C) 2001 John Hornkvist
Copyright (C) 2002, 2006, 2007 Free Software Foundation, Inc.
Copyright (C) 2002, 2006, 2007, 2009 Free Software Foundation, Inc.
FFI support for Darwin and AIX.
@@ -80,34 +80,34 @@ enum { ASM_NEEDS_REGISTERS = 4 };
*/
void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
void ffi_prep_args(extended_cif *ecif, unsigned long *const stack)
{
const unsigned bytes = ecif->cif->bytes;
const unsigned flags = ecif->cif->flags;
/* 'stacktop' points at the previous backchain pointer. */
unsigned *const stacktop = stack + (bytes / sizeof(unsigned));
unsigned long *const stacktop = stack + (bytes / sizeof(unsigned long));
/* 'fpr_base' points at the space for fpr1, and grows upwards as
we use FPR registers. */
double *fpr_base = (double*) (stacktop - ASM_NEEDS_REGISTERS) - NUM_FPR_ARG_REGISTERS;
double *fpr_base = (double *) (stacktop - ASM_NEEDS_REGISTERS) - NUM_FPR_ARG_REGISTERS;
int fparg_count = 0;
/* 'next_arg' grows up as we put parameters in it. */
unsigned *next_arg = stack + 6; /* 6 reserved positions. */
unsigned long *next_arg = stack + 6; /* 6 reserved positions. */
int i = ecif->cif->nargs;
int i;
double double_tmp;
void **p_argv = ecif->avalue;
unsigned gprvalue;
unsigned long gprvalue;
ffi_type** ptr = ecif->cif->arg_types;
char *dest_cpy;
unsigned size_al = 0;
/* Check that everything starts aligned properly. */
FFI_ASSERT(((unsigned)(char *)stack & 0xF) == 0);
FFI_ASSERT(((unsigned)(char *)stacktop & 0xF) == 0);
FFI_ASSERT(((unsigned) (char *) stack & 0xF) == 0);
FFI_ASSERT(((unsigned) (char *) stacktop & 0xF) == 0);
FFI_ASSERT((bytes & 0xF) == 0);
/* Deal with return values that are actually pass-by-reference.
@@ -115,12 +115,10 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
Return values are referenced by r3, so r4 is the first parameter. */
if (flags & FLAG_RETVAL_REFERENCE)
*next_arg++ = (unsigned)(char *)ecif->rvalue;
*next_arg++ = (unsigned long) (char *) ecif->rvalue;
/* Now for the arguments. */
for (;
i > 0;
i--, ptr++, p_argv++)
for (i = ecif->cif->nargs; i > 0; i--, ptr++, p_argv++)
{
switch ((*ptr)->type)
{
@@ -128,7 +126,7 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
purpose registers are filled, the corresponding GPRs that match
the size of the floating-point parameter are skipped. */
case FFI_TYPE_FLOAT:
double_tmp = *(float *)*p_argv;
double_tmp = *(float *) *p_argv;
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
else
@@ -139,12 +137,16 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
break;
case FFI_TYPE_DOUBLE:
double_tmp = *(double *)*p_argv;
double_tmp = *(double *) *p_argv;
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
else
*fpr_base++ = double_tmp;
#ifdef POWERPC64
next_arg++;
#else
next_arg += 2;
#endif
fparg_count++;
FFI_ASSERT(flags & FLAG_FP_ARGUMENTS);
break;
@@ -152,42 +154,71 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
case FFI_TYPE_LONGDOUBLE:
double_tmp = ((double *)*p_argv)[0];
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
#ifdef POWERPC64
if (fparg_count < NUM_FPR_ARG_REGISTERS)
*(long double *) fpr_base++ = *(long double *) *p_argv;
else
*(long double *) next_arg = *(long double *) *p_argv;
next_arg += 2;
fparg_count += 2;
#else
double_tmp = ((double *) *p_argv)[0];
if (fparg_count < NUM_FPR_ARG_REGISTERS)
*fpr_base++ = double_tmp;
else
*(double *) next_arg = double_tmp;
next_arg += 2;
fparg_count++;
double_tmp = ((double *)*p_argv)[1];
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
else
double_tmp = ((double *) *p_argv)[1];
if (fparg_count < NUM_FPR_ARG_REGISTERS)
*fpr_base++ = double_tmp;
else
*(double *) next_arg = double_tmp;
next_arg += 2;
fparg_count++;
#endif
FFI_ASSERT(flags & FLAG_FP_ARGUMENTS);
break;
#endif
case FFI_TYPE_UINT64:
case FFI_TYPE_SINT64:
*(long long *)next_arg = *(long long *)*p_argv;
next_arg+=2;
#ifdef POWERPC64
gprvalue = *(long long *) *p_argv;
goto putgpr;
#else
*(long long *) next_arg = *(long long *) *p_argv;
next_arg += 2;
#endif
break;
case FFI_TYPE_POINTER:
gprvalue = *(unsigned long *) *p_argv;
goto putgpr;
case FFI_TYPE_UINT8:
gprvalue = *(unsigned char *)*p_argv;
gprvalue = *(unsigned char *) *p_argv;
goto putgpr;
case FFI_TYPE_SINT8:
gprvalue = *(signed char *)*p_argv;
gprvalue = *(signed char *) *p_argv;
goto putgpr;
case FFI_TYPE_UINT16:
gprvalue = *(unsigned short *)*p_argv;
gprvalue = *(unsigned short *) *p_argv;
goto putgpr;
case FFI_TYPE_SINT16:
gprvalue = *(signed short *)*p_argv;
gprvalue = *(signed short *) *p_argv;
goto putgpr;
case FFI_TYPE_STRUCT:
#ifdef POWERPC64
dest_cpy = (char *) next_arg;
size_al = (*ptr)->size;
if ((*ptr)->elements[0]->type == 3)
size_al = ALIGN((*ptr)->size, 8);
if (size_al < 3 && ecif->cif->abi == FFI_DARWIN)
dest_cpy += 4 - size_al;
memcpy ((char *) dest_cpy, (char *) *p_argv, size_al);
next_arg += (size_al + 7) / 8;
#else
dest_cpy = (char *) next_arg;
/* Structures that match the basic modes (QI 1 byte, HI 2 bytes,
@@ -195,22 +226,24 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
Structures with 3 byte in size are padded upwards. */
size_al = (*ptr)->size;
/* If the first member of the struct is a double, then align
the struct to double-word.
Type 3 is defined in include/ffi.h. #define FFI_TYPE_DOUBLE 3. */
if ((*ptr)->elements[0]->type == 3)
the struct to double-word. */
if ((*ptr)->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN((*ptr)->size, 8);
if (size_al < 3 && ecif->cif->abi == FFI_DARWIN)
dest_cpy += 4 - size_al;
memcpy((char *)dest_cpy, (char *)*p_argv, size_al);
memcpy((char *) dest_cpy, (char *) *p_argv, size_al);
next_arg += (size_al + 3) / 4;
#endif
break;
case FFI_TYPE_INT:
case FFI_TYPE_UINT32:
case FFI_TYPE_SINT32:
case FFI_TYPE_POINTER:
gprvalue = *(unsigned *)*p_argv;
gprvalue = *(signed int *) *p_argv;
goto putgpr;
case FFI_TYPE_UINT32:
gprvalue = *(unsigned int *) *p_argv;
putgpr:
*next_arg++ = gprvalue;
break;
@@ -324,6 +357,9 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
case FFI_TYPE_UINT64:
case FFI_TYPE_SINT64:
#ifdef POWERPC64
case FFI_TYPE_POINTER:
#endif
flags |= FLAG_RETURNS_64BITS;
break;
@@ -387,11 +423,14 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
case FFI_TYPE_STRUCT:
size_al = (*ptr)->size;
/* If the first member of the struct is a double, then align
the struct to double-word.
Type 3 is defined in include/ffi.h. #define FFI_TYPE_DOUBLE 3. */
if ((*ptr)->elements[0]->type == 3)
the struct to double-word. */
if ((*ptr)->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN((*ptr)->size, 8);
#ifdef POWERPC64
intarg_count += (size_al + 7) / 8;
#else
intarg_count += (size_al + 3) / 4;
#endif
break;
default:
@@ -410,8 +449,13 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
bytes += NUM_FPR_ARG_REGISTERS * sizeof(double);
/* Stack space. */
#ifdef POWERPC64
if ((intarg_count + fparg_count) > NUM_GPR_ARG_REGISTERS)
bytes += (intarg_count + fparg_count) * sizeof(long);
#else
if ((intarg_count + 2 * fparg_count) > NUM_GPR_ARG_REGISTERS)
bytes += (intarg_count + 2 * fparg_count) * sizeof(long);
#endif
else
bytes += NUM_GPR_ARG_REGISTERS * sizeof(long);
@@ -424,9 +468,9 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
return FFI_OK;
}
extern void ffi_call_AIX(extended_cif *, unsigned, unsigned, unsigned *,
extern void ffi_call_AIX(extended_cif *, long, unsigned, unsigned *,
void (*fn)(void), void (*fn2)(void));
extern void ffi_call_DARWIN(extended_cif *, unsigned, unsigned, unsigned *,
extern void ffi_call_DARWIN(extended_cif *, long, unsigned, unsigned *,
void (*fn)(void), void (*fn2)(void));
void ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)
@@ -450,11 +494,11 @@ void ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)
switch (cif->abi)
{
case FFI_AIX:
ffi_call_AIX(&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_call_AIX(&ecif, -(long)cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_prep_args);
break;
case FFI_DARWIN:
ffi_call_DARWIN(&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_call_DARWIN(&ecif, -(long)cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_prep_args);
break;
default:
@@ -645,26 +689,19 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
void ** avalue;
ffi_type ** arg_types;
long i, avn;
long nf; /* number of floating registers already used. */
long ng; /* number of general registers already used. */
ffi_cif * cif;
double temp;
ffi_dblfl * end_pfr = pfr + NUM_FPR_ARG_REGISTERS;
unsigned size_al;
union ldu temp_ld;
cif = closure->cif;
avalue = alloca(cif->nargs * sizeof(void *));
nf = 0;
ng = 0;
/* Copy the caller's structure return value address so that the closure
returns the data directly to the caller. */
if (cif->rtype->type == FFI_TYPE_STRUCT)
{
rvalue = (void *) *pgr;
pgr++;
ng++;
}
i = 0;
@@ -678,58 +715,82 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
{
case FFI_TYPE_SINT8:
case FFI_TYPE_UINT8:
#ifdef POWERPC64
avalue[i] = (char *) pgr + 7;
#else
avalue[i] = (char *) pgr + 3;
ng++;
#endif
pgr++;
break;
case FFI_TYPE_SINT16:
case FFI_TYPE_UINT16:
#ifdef POWERPC64
avalue[i] = (char *) pgr + 6;
#else
avalue[i] = (char *) pgr + 2;
ng++;
#endif
pgr++;
break;
case FFI_TYPE_SINT32:
case FFI_TYPE_UINT32:
#ifdef POWERPC64
avalue[i] = (char *) pgr + 4;
#else
case FFI_TYPE_POINTER:
avalue[i] = pgr;
ng++;
#endif
pgr++;
break;
case FFI_TYPE_STRUCT:
#ifdef POWERPC64
size_al = arg_types[i]->size;
if (arg_types[i]->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN (arg_types[i]->size, 8);
if (size_al < 3 && cif->abi == FFI_DARWIN)
avalue[i] = (void *) pgr + 8 - size_al;
else
avalue[i] = (void *) pgr;
pgr += (size_al + 7) / 8;
#else
/* Structures that match the basic modes (QI 1 byte, HI 2 bytes,
SI 4 bytes) are aligned as if they were those modes. */
size_al = arg_types[i]->size;
/* If the first member of the struct is a double, then align
the struct to double-word.
Type 3 is defined in include/ffi.h. #define FFI_TYPE_DOUBLE 3. */
if (arg_types[i]->elements[0]->type == 3)
the struct to double-word. */
if (arg_types[i]->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN(arg_types[i]->size, 8);
if (size_al < 3 && cif->abi == FFI_DARWIN)
avalue[i] = (void*) pgr + 4 - size_al;
else
avalue[i] = (void*) pgr;
ng += (size_al + 3) / 4;
pgr += (size_al + 3) / 4;
#endif
break;
case FFI_TYPE_SINT64:
case FFI_TYPE_UINT64:
#ifdef POWERPC64
case FFI_TYPE_POINTER:
avalue[i] = pgr;
pgr++;
break;
#else
/* Long long ints are passed in two gpr's. */
avalue[i] = pgr;
ng += 2;
pgr += 2;
break;
#endif
case FFI_TYPE_FLOAT:
/* A float value consumes a GPR.
There are 13 64bit floating point registers. */
if (nf < NUM_FPR_ARG_REGISTERS)
if (pfr < end_pfr)
{
temp = pfr->d;
pfr->f = (float)temp;
double temp = pfr->d;
pfr->f = (float) temp;
avalue[i] = pfr;
pfr++;
}
@@ -737,15 +798,13 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
{
avalue[i] = pgr;
}
nf++;
ng++;
pgr++;
break;
case FFI_TYPE_DOUBLE:
/* A double value consumes two GPRs.
There are 13 64bit floating point registers. */
if (nf < NUM_FPR_ARG_REGISTERS)
if (pfr < end_pfr)
{
avalue[i] = pfr;
pfr++;
@@ -754,17 +813,36 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
{
avalue[i] = pgr;
}
nf++;
ng += 2;
#ifdef POWERPC64
pgr++;
#else
pgr += 2;
#endif
break;
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
case FFI_TYPE_LONGDOUBLE:
#ifdef POWERPC64
if (pfr + 1 < end_pfr)
{
avalue[i] = pfr;
pfr += 2;
}
else
{
if (pfr < end_pfr)
{
*pgr = *(unsigned long *) pfr;
pfr++;
}
avalue[i] = pgr;
}
pgr += 2;
#else /* POWERPC64 */
/* A long double value consumes four GPRs and two FPRs.
There are 13 64bit floating point registers. */
if (nf < NUM_FPR_ARG_REGISTERS - 1)
if (pfr + 1 < end_pfr)
{
avalue[i] = pfr;
pfr += 2;
@@ -772,19 +850,20 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
/* Here we have the situation where one part of the long double
is stored in fpr13 and the other part is already on the stack.
We use a union to pass the long double to avalue[i]. */
else if (nf == NUM_FPR_ARG_REGISTERS - 1)
else if (pfr + 1 == end_pfr)
{
union ldu temp_ld;
memcpy (&temp_ld.lb[0], pfr, sizeof(ldbits));
memcpy (&temp_ld.lb[1], pgr + 2, sizeof(ldbits));
avalue[i] = &temp_ld.ld;
pfr++;
}
else
{
avalue[i] = pgr;
}
nf += 2;
ng += 4;
pgr += 4;
#endif /* POWERPC64 */
break;
#endif
default:

6
src/powerpc/.svn/text-base/ffitarget.h.svn-base
View File

@@ -30,7 +30,11 @@
/* ---- System specific configurations ----------------------------------- */
#if defined (POWERPC) && defined (__powerpc64__)
#if defined (POWERPC) && defined (__powerpc64__) /* linux64 */
#define POWERPC64
#elif defined (POWERPC_DARWIN) && defined (__ppc64__) /* Darwin */
#define POWERPC64
#elif defined (POWERPC_AIX) && defined (__64BIT__) /* AIX64 */
#define POWERPC64
#endif

233
src/powerpc/aix.S
View File

@@ -1,5 +1,5 @@
/* -----------------------------------------------------------------------
aix.S - Copyright (c) 2002 Free Software Foundation, Inc.
aix.S - Copyright (c) 2002,2009 Free Software Foundation, Inc.
based on darwin.S by John Hornkvist
PowerPC Assembly glue.
@@ -86,9 +86,13 @@
#define L(x) x
.file "aix.S"
.toc
.csect .text[PR]
.align 2
.globl ffi_prep_args
/* void ffi_call_AIX(extended_cif *ecif, unsigned long bytes,
* unsigned int flags, unsigned int *rvalue,
* void (*fn)(),
* void (*prep_args)(extended_cif*, unsigned *const));
* r3=ecif, r4=bytes, r5=flags, r6=rvalue, r7=fn, r8=prep_args
*/
.csect .text[PR]
.align 2
@@ -96,65 +100,151 @@
.globl .ffi_call_AIX
.csect ffi_call_AIX[DS]
ffi_call_AIX:
#if defined(_ARCH_PPC64)
#ifdef __64BIT__
.llong .ffi_call_AIX, TOC[tc0], 0
#else
.long .ffi_call_AIX, TOC[tc0], 0
#endif
.csect .text[PR]
.csect .text[PR]
.ffi_call_AIX:
mr r12,r8 // We only need r12 until the call, so it doesn't have to be saved...
/* Save the old stack pointer as AP. */
mr r8,r1
/* Allocate the stack space we need. */
stwux r1,r1,r4
/* Save registers we use. */
mflr r9
mflr r0
stw r28,-16(r8)
stw r29,-12(r8)
stw r30, -8(r8)
stw r31, -4(r8)
std r28,-32(r1)
std r29,-24(r1)
std r30,-16(r1)
std r31, -8(r1)
stw r9, 8(r8)
stw r2, 20(r1)
std r0, 16(r1)
mr r28, r1 /* our AP. */
stdux r1, r1, r4
/* Save arguments over call... */
mr r31,r5 /* flags, */
mr r30,r6 /* rvalue, */
mr r29,r7 /* function address, */
mr r28,r8 /* our AP. */
mr r31, r5 /* flags, */
mr r30, r6 /* rvalue, */
mr r29, r7 /* function address. */
std r2, 40(r1)
/* Call ffi_prep_args. */
mr r4,r1
li r9,0
lwz r2,4(r12)
lwz r12,0(r12)
mtctr r12 // r12 holds address of _ffi_prep_args
bctrl
lwz r2,20(r1)
mr r4, r1
bl .ffi_prep_args
/* Now do the call. */
lwz r12,0(r29)
ld r0, 0(r29)
ld r2, 8(r29)
ld r11, 16(r29)
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40,r31
stw r2,20(r1)
mtctr r12
lwz r2,4(r29)
mtcrf 0x40, r31
mtctr r0
/* Load all those argument registers. */
// We have set up a nice stack frame, just load it into registers.
lwz r3, 20+(1*4)(r1)
lwz r4, 20+(2*4)(r1)
lwz r5, 20+(3*4)(r1)
lwz r6, 20+(4*4)(r1)
ld r3, 40+(1*8)(r1)
ld r4, 40+(2*8)(r1)
ld r5, 40+(3*8)(r1)
ld r6, 40+(4*8)(r1)
nop
lwz r7, 20+(5*4)(r1)
lwz r8, 20+(6*4)(r1)
lwz r9, 20+(7*4)(r1)
lwz r10,20+(8*4)(r1)
ld r7, 40+(5*8)(r1)
ld r8, 40+(6*8)(r1)
ld r9, 40+(7*8)(r1)
ld r10,40+(8*8)(r1)
L1:
/* Load all the FP registers. */
bf 6,L2 // 2f + 0x18
lfd f1,-32-(13*8)(r28)
lfd f2,-32-(12*8)(r28)
lfd f3,-32-(11*8)(r28)
lfd f4,-32-(10*8)(r28)
nop
lfd f5,-32-(9*8)(r28)
lfd f6,-32-(8*8)(r28)
lfd f7,-32-(7*8)(r28)
lfd f8,-32-(6*8)(r28)
nop
lfd f9,-32-(5*8)(r28)
lfd f10,-32-(4*8)(r28)
lfd f11,-32-(3*8)(r28)
lfd f12,-32-(2*8)(r28)
nop
lfd f13,-32-(1*8)(r28)
L2:
/* Make the call. */
bctrl
ld r2, 40(r1)
/* Now, deal with the return value. */
mtcrf 0x01, r31
bt 30, L(done_return_value)
bt 29, L(fp_return_value)
std r3, 0(r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
mr r1, r28
ld r0, 16(r28)
ld r28, -32(r1)
mtlr r0
ld r29, -24(r1)
ld r30, -16(r1)
ld r31, -8(r1)
blr
L(fp_return_value):
bf 28, L(float_return_value)
stfd f1, 0(r30)
bf 31, L(done_return_value)
stfd f2, 8(r30)
b L(done_return_value)
L(float_return_value):
stfs f1, 0(r30)
b L(done_return_value)
#else /* ! __64BIT__ */
.long .ffi_call_AIX, TOC[tc0], 0
.csect .text[PR]
.ffi_call_AIX:
/* Save registers we use. */
mflr r0
stw r28,-16(r1)
stw r29,-12(r1)
stw r30, -8(r1)
stw r31, -4(r1)
stw r0, 8(r1)
mr r28, r1 /* out AP. */
stwux r1, r1, r4
/* Save arguments over call... */
mr r31, r5 /* flags, */
mr r30, r6 /* rvalue, */
mr r29, r7 /* function address, */
stw r2, 20(r1)
/* Call ffi_prep_args. */
mr r4, r1
bl .ffi_prep_args
/* Now do the call. */
lwz r0, 0(r29)
lwz r2, 4(r29)
lwz r11, 8(r29)
/* Set up cr1 with bits 4-7 of the flags. */
mtcrf 0x40, r31
mtctr r0
/* Load all those argument registers. */
// We have set up a nice stack frame, just load it into registers.
lwz r3, 20+(1*4)(r1)
lwz r4, 20+(2*4)(r1)
lwz r5, 20+(3*4)(r1)
lwz r6, 20+(4*4)(r1)
nop
lwz r7, 20+(5*4)(r1)
lwz r8, 20+(6*4)(r1)
lwz r9, 20+(7*4)(r1)
lwz r10,20+(8*4)(r1)
L1:
/* Load all the FP registers. */
@@ -169,47 +259,48 @@ L1:
lfd f7,-16-(7*8)(r28)
lfd f8,-16-(6*8)(r28)
nop
lfd f9,-16-(5*8)(r28)
lfd f10,-16-(4*8)(r28)
lfd f11,-16-(3*8)(r28)
lfd f12,-16-(2*8)(r28)
lfd f9,-16-(5*8)(r28)
lfd f10,-16-(4*8)(r28)
lfd f11,-16-(3*8)(r28)
lfd f12,-16-(2*8)(r28)
nop
lfd f13,-16-(1*8)(r28)
lfd f13,-16-(1*8)(r28)
L2:
/* Make the call. */
bctrl
lwz r2,20(r1)
lwz r2, 20(r1)
/* Now, deal with the return value. */
mtcrf 0x01,r31
mtcrf 0x01, r31
bt 30,L(done_return_value)
bt 29,L(fp_return_value)
stw r3,0(r30)
bf 28,L(done_return_value)
stw r4,4(r30)
bt 30, L(done_return_value)
bt 29, L(fp_return_value)
stw r3, 0(r30)
bf 28, L(done_return_value)
stw r4, 4(r30)
/* Fall through... */
L(done_return_value):
/* Restore the registers we used and return. */
lwz r9, 8(r28)
lwz r31, -4(r28)
mtlr r9
lwz r30, -8(r28)
lwz r29,-12(r28)
lwz r28,-16(r28)
lwz r1,0(r1)
mr r1, r28
lwz r0, 8(r28)
lwz r28,-16(r1)
mtlr r0
lwz r29,-12(r1)
lwz r30, -8(r1)
lwz r31, -4(r1)
blr
L(fp_return_value):
bf 28,L(float_return_value)
stfd f1,0(r30)
bf 28, L(float_return_value)
stfd f1, 0(r30)
b L(done_return_value)
L(float_return_value):
stfs f1,0(r30)
stfs f1, 0(r30)
b L(done_return_value)
#endif
.long 0
.byte 0,0,0,1,128,4,0,0
//END(ffi_call_AIX)
@@ -220,7 +311,7 @@ L(float_return_value):
.globl .ffi_call_DARWIN
.csect ffi_call_DARWIN[DS]
ffi_call_DARWIN:
#if defined(_ARCH_PPC64)
#ifdef __64BIT__
.llong .ffi_call_DARWIN, TOC[tc0], 0
#else
.long .ffi_call_DARWIN, TOC[tc0], 0

429
src/powerpc/aix_closure.S
View File

@@ -1,5 +1,5 @@
/* -----------------------------------------------------------------------
aix_closure.S - Copyright (c) 2002 2003 Free Software Foundation, Inc.
aix_closure.S - Copyright (c) 2002, 2003, 2009 Free Software Foundation, Inc.
based on darwin_closure.S
PowerPC Assembly glue.
@@ -84,7 +84,6 @@
#define L(x) x
.file "aix_closure.S"
.toc
.extern .ffi_closure_helper_DARWIN
LC..60:
.tc L..60[TC],L..60
.csect .text[PR]
@@ -95,69 +94,66 @@ LC..60:
.globl ffi_closure_ASM
.globl .ffi_closure_ASM
.csect ffi_closure_ASM[DS]
ffi_closure_ASM:
#if defined(_ARCH_PPC64)
#ifdef __64BIT__
.llong .ffi_closure_ASM, TOC[tc0], 0
#else
.long .ffi_closure_ASM, TOC[tc0], 0
#endif
.csect .text[PR]
.ffi_closure_ASM:
mflr r0 /* extract return address */
stw r0, 8(r1) /* save the return address */
/* 24 Bytes (Linkage Area) */
/* 32 Bytes (params) */
/* 104 Bytes (13*8 from FPR) */
/* 8 Bytes (result) */
/* 168 Bytes */
stwu r1,-176(r1) /* skip over caller save area
keep stack aligned to 16 */
/* we want to build up an area for the parameters passed */
/* in registers (both floating point and integer) */
/* we store gpr 3 to gpr 10 (aligned to 4)
in the parents outgoing area */
stw r3, 200(r1)
stw r4, 204(r1)
stw r5, 208(r1)
stw r6, 212(r1)
stw r7, 216(r1)
stw r8, 220(r1)
stw r9, 224(r1)
stw r10, 228(r1)
std r3, 48+(0*8)(r1)
std r4, 48+(1*8)(r1)
std r5, 48+(2*8)(r1)
std r6, 48+(3*8)(r1)
mflr r0
std r7, 48+(4*8)(r1)
std r8, 48+(5*8)(r1)
std r9, 48+(6*8)(r1)
std r10, 48+(7*8)(r1)
std r0, 16(r1) /* save the return address */
/* 48 Bytes (Linkage Area) */
/* 64 Bytes (params) */
/* 16 Bytes (result) */
/* 104 Bytes (13*8 from FPR) */
/* 8 Bytes (alignment) */
/* 240 Bytes */
stdu r1, -240(r1) /* skip over caller save area
keep stack aligned to 16 */
/* next save fpr 1 to fpr 13 (aligned to 8) */
stfd f1, 56(r1)
stfd f2, 64(r1)
stfd f3, 72(r1)
stfd f4, 80(r1)
stfd f5, 88(r1)
stfd f6, 96(r1)
stfd f7, 104(r1)
stfd f8, 112(r1)
stfd f9, 120(r1)
stfd f10, 128(r1)
stfd f11, 136(r1)
stfd f12, 144(r1)
stfd f13, 152(r1)
stfd f1, 128+(0*8)(r1)
stfd f2, 128+(1*8)(r1)
stfd f3, 128+(2*8)(r1)
stfd f4, 128+(3*8)(r1)
stfd f5, 128+(4*8)(r1)
stfd f6, 128+(5*8)(r1)
stfd f7, 128+(6*8)(r1)
stfd f8, 128+(7*8)(r1)
stfd f9, 128+(8*8)(r1)
stfd f10, 128+(9*8)(r1)
stfd f11, 128+(10*8)(r1)
stfd f12, 128+(11*8)(r1)
stfd f13, 128+(12*8)(r1)
/* set up registers for the routine that actually does the work */
/* get the context pointer from the trampoline */
mr r3,r11
mr r3, r11
/* now load up the pointer to the result storage */
addi r4,r1,160
addi r4, r1, 112
/* now load up the pointer to the saved gpr registers */
addi r5,r1,200
addi r5, r1, 288
/* now load up the pointer to the saved fpr registers */
addi r6,r1,56
addi r6, r1, 128
/* make the call */
bl .ffi_closure_helper_DARWIN
@@ -169,84 +165,279 @@ ffi_closure_ASM:
/* look up the proper starting point in table */
/* by using return type as offset */
addi r5,r1,160 /* get pointer to results area */
lwz r4,LC..60(2) /* get address of jump table */
slwi r3,r3,2 /* now multiply return type by 4 */
lwzx r3,r4,r3 /* get the contents of that table value */
add r3,r3,r4 /* add contents of table to table address */
mtctr r3
ld r4, LC..60(2) /* get address of jump table */
sldi r3, r3, 4 /* now multiply return type by 16 */
ld r0, 240+16(r1) /* load return address */
add r3, r3, r4 /* add contents of table to table address */
mtctr r3
bctr /* jump to it */
/* Each fragment must be exactly 16 bytes long (4 instructions).
Align to 16 byte boundary for cache and dispatch efficiency. */
.align 4
L..60:
.long L..44-L..60 /* FFI_TYPE_VOID */
.long L..50-L..60 /* FFI_TYPE_INT */
.long L..47-L..60 /* FFI_TYPE_FLOAT */
.long L..46-L..60 /* FFI_TYPE_DOUBLE */
.long L..46-L..60 /* FFI_TYPE_LONGDOUBLE */
.long L..56-L..60 /* FFI_TYPE_UINT8 */
.long L..55-L..60 /* FFI_TYPE_SINT8 */
.long L..58-L..60 /* FFI_TYPE_UINT16 */
.long L..57-L..60 /* FFI_TYPE_SINT16 */
.long L..50-L..60 /* FFI_TYPE_UINT32 */
.long L..50-L..60 /* FFI_TYPE_SINT32 */
.long L..48-L..60 /* FFI_TYPE_UINT64 */
.long L..48-L..60 /* FFI_TYPE_SINT64 */
.long L..44-L..60 /* FFI_TYPE_STRUCT */
.long L..50-L..60 /* FFI_TYPE_POINTER */
/* case FFI_TYPE_VOID */
mtlr r0
addi r1, r1, 240
blr
nop
/* case double */
L..46:
lfd f1,0(r5)
b L..44
/* case float */
L..47:
lfs f1,0(r5)
b L..44
/* case long long */
L..48:
lwz r3,0(r5)
lwz r4,4(r5)
b L..44
/* case default / int32 / pointer */
L..50:
lwz r3,0(r5)
b L..44
/* case signed int8 */
L..55:
addi r5,r5,3
lbz r3,0(r5)
slwi r3,r3,24
srawi r3,r3,24
b L..44
/* case unsigned int8 */
L..56:
addi r5,r5,3
lbz r3,0(r5)
b L..44
/* case signed int16 */
L..57:
addi r5,r5,2
lhz r3,0(r5)
extsh r3,r3
b L..44
/* case unsigned int16 */
L..58:
addi r5,r5,2
lhz r3,0(r5)
/* case void / done */
L..44:
addi r1,r1,176 /* restore stack pointer */
lwz r0,8(r1) /* get return address */
mtlr r0 /* reset link register */
/* case FFI_TYPE_INT */
lwa r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_FLOAT */
lfs f1, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_DOUBLE */
lfd f1, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_LONGDOUBLE */
lfd f1, 112+0(r1)
mtlr r0
lfd f2, 112+8(r1)
b L..finish
/* case FFI_TYPE_UINT8 */
lbz r3, 112+7(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT8 */
lbz r3, 112+7(r1)
mtlr r0
extsb r3, r3
b L..finish
/* case FFI_TYPE_UINT16 */
lhz r3, 112+6(r1)
mtlr r0
L..finish:
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT16 */
lha r3, 112+6(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_UINT32 */
lwz r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT32 */
lwa r3, 112+4(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_UINT64 */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_SINT64 */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
/* case FFI_TYPE_STRUCT */
mtlr r0
addi r1, r1, 240
blr
nop
/* case FFI_TYPE_POINTER */
ld r3, 112+0(r1)
mtlr r0
addi r1, r1, 240
blr
#else /* ! __64BIT__ */
.long .ffi_closure_ASM, TOC[tc0], 0
.csect .text[PR]
.ffi_closure_ASM:
/* we want to build up an area for the parameters passed */
/* in registers (both floating point and integer) */
/* we store gpr 3 to gpr 10 (aligned to 4)
in the parents outgoing area */
stw r3, 24+(0*4)(r1)
stw r4, 24+(1*4)(r1)
stw r5, 24+(2*4)(r1)
stw r6, 24+(3*4)(r1)
mflr r0
stw r7, 24+(4*4)(r1)
stw r8, 24+(5*4)(r1)
stw r9, 24+(6*4)(r1)
stw r10, 24+(7*4)(r1)
stw r0, 8(r1)
/* 24 Bytes (Linkage Area) */
/* 32 Bytes (params) */
/* 16 Bytes (result) */
/* 104 Bytes (13*8 from FPR) */
/* 176 Bytes */
stwu r1, -176(r1) /* skip over caller save area
keep stack aligned to 16 */
/* next save fpr 1 to fpr 13 (aligned to 8) */
stfd f1, 72+(0*8)(r1)
stfd f2, 72+(1*8)(r1)
stfd f3, 72+(2*8)(r1)
stfd f4, 72+(3*8)(r1)
stfd f5, 72+(4*8)(r1)
stfd f6, 72+(5*8)(r1)
stfd f7, 72+(6*8)(r1)
stfd f8, 72+(7*8)(r1)
stfd f9, 72+(8*8)(r1)
stfd f10, 72+(9*8)(r1)
stfd f11, 72+(10*8)(r1)
stfd f12, 72+(11*8)(r1)
stfd f13, 72+(12*8)(r1)
/* set up registers for the routine that actually does the work */
/* get the context pointer from the trampoline */
mr r3, r11
/* now load up the pointer to the result storage */
addi r4, r1, 56
/* now load up the pointer to the saved gpr registers */
addi r5, r1, 200
/* now load up the pointer to the saved fpr registers */
addi r6, r1, 72
/* make the call */
bl .ffi_closure_helper_DARWIN
nop
/* now r3 contains the return type */
/* so use it to look up in a table */
/* so we know how to deal with each type */
/* look up the proper starting point in table */
/* by using return type as offset */
lwz r4, LC..60(2) /* get address of jump table */
slwi r3, r3, 4 /* now multiply return type by 4 */
lwz r0, 176+8(r1) /* load return address */
add r3, r3, r4 /* add contents of table to table address */
mtctr r3
bctr /* jump to it */
/* Each fragment must be exactly 16 bytes long (4 instructions).
Align to 16 byte boundary for cache and dispatch efficiency. */
.align 4
L..60:
/* case FFI_TYPE_VOID */
mtlr r0
addi r1, r1, 176
blr
nop
/* case FFI_TYPE_INT */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_FLOAT */
lfs f1, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_DOUBLE */
lfd f1, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_LONGDOUBLE */
lfd f1, 56+0(r1)
mtlr r0
lfd f2, 56+8(r1)
b L..finish
/* case FFI_TYPE_UINT8 */
lbz r3, 56+3(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT8 */
lbz r3, 56+3(r1)
mtlr r0
extsb r3, r3
b L..finish
/* case FFI_TYPE_UINT16 */
lhz r3, 56+2(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT16 */
lha r3, 56+2(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_UINT32 */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_SINT32 */
lwz r3, 56+0(r1)
mtlr r0
addi r1, r1, 176
blr
/* case FFI_TYPE_UINT64 */
lwz r3, 56+0(r1)
mtlr r0
lwz r4, 56+4(r1)
b L..finish
/* case FFI_TYPE_SINT64 */
lwz r3, 56+0(r1)
mtlr r0
lwz r4, 56+4(r1)
b L..finish
/* case FFI_TYPE_STRUCT */
mtlr r0
addi r1, r1, 176
blr
nop
/* case FFI_TYPE_POINTER */
lwz r3, 56+0(r1)
mtlr r0
L..finish:
addi r1, r1, 176
blr
#endif
/* END(ffi_closure_ASM) */

219
src/powerpc/ffi_darwin.c
View File

@@ -3,7 +3,7 @@
Copyright (C) 1998 Geoffrey Keating
Copyright (C) 2001 John Hornkvist
Copyright (C) 2002, 2006, 2007 Free Software Foundation, Inc.
Copyright (C) 2002, 2006, 2007, 2009 Free Software Foundation, Inc.
FFI support for Darwin and AIX.
@@ -80,34 +80,34 @@ enum { ASM_NEEDS_REGISTERS = 4 };
*/
void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
void ffi_prep_args(extended_cif *ecif, unsigned long *const stack)
{
const unsigned bytes = ecif->cif->bytes;
const unsigned flags = ecif->cif->flags;
/* 'stacktop' points at the previous backchain pointer. */
unsigned *const stacktop = stack + (bytes / sizeof(unsigned));
unsigned long *const stacktop = stack + (bytes / sizeof(unsigned long));
/* 'fpr_base' points at the space for fpr1, and grows upwards as
we use FPR registers. */
double *fpr_base = (double*) (stacktop - ASM_NEEDS_REGISTERS) - NUM_FPR_ARG_REGISTERS;
double *fpr_base = (double *) (stacktop - ASM_NEEDS_REGISTERS) - NUM_FPR_ARG_REGISTERS;
int fparg_count = 0;
/* 'next_arg' grows up as we put parameters in it. */
unsigned *next_arg = stack + 6; /* 6 reserved positions. */
unsigned long *next_arg = stack + 6; /* 6 reserved positions. */
int i = ecif->cif->nargs;
int i;
double double_tmp;
void **p_argv = ecif->avalue;
unsigned gprvalue;
unsigned long gprvalue;
ffi_type** ptr = ecif->cif->arg_types;
char *dest_cpy;
unsigned size_al = 0;
/* Check that everything starts aligned properly. */
FFI_ASSERT(((unsigned)(char *)stack & 0xF) == 0);
FFI_ASSERT(((unsigned)(char *)stacktop & 0xF) == 0);
FFI_ASSERT(((unsigned) (char *) stack & 0xF) == 0);
FFI_ASSERT(((unsigned) (char *) stacktop & 0xF) == 0);
FFI_ASSERT((bytes & 0xF) == 0);
/* Deal with return values that are actually pass-by-reference.
@@ -115,12 +115,10 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
Return values are referenced by r3, so r4 is the first parameter. */
if (flags & FLAG_RETVAL_REFERENCE)
*next_arg++ = (unsigned)(char *)ecif->rvalue;
*next_arg++ = (unsigned long) (char *) ecif->rvalue;
/* Now for the arguments. */
for (;
i > 0;
i--, ptr++, p_argv++)
for (i = ecif->cif->nargs; i > 0; i--, ptr++, p_argv++)
{
switch ((*ptr)->type)
{
@@ -128,7 +126,7 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
purpose registers are filled, the corresponding GPRs that match
the size of the floating-point parameter are skipped. */
case FFI_TYPE_FLOAT:
double_tmp = *(float *)*p_argv;
double_tmp = *(float *) *p_argv;
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
else
@@ -139,12 +137,16 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
break;
case FFI_TYPE_DOUBLE:
double_tmp = *(double *)*p_argv;
double_tmp = *(double *) *p_argv;
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
else
*fpr_base++ = double_tmp;
#ifdef POWERPC64
next_arg++;
#else
next_arg += 2;
#endif
fparg_count++;
FFI_ASSERT(flags & FLAG_FP_ARGUMENTS);
break;
@@ -152,42 +154,71 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
case FFI_TYPE_LONGDOUBLE:
double_tmp = ((double *)*p_argv)[0];
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
#ifdef POWERPC64
if (fparg_count < NUM_FPR_ARG_REGISTERS)
*(long double *) fpr_base++ = *(long double *) *p_argv;
else
*(long double *) next_arg = *(long double *) *p_argv;
next_arg += 2;
fparg_count += 2;
#else
double_tmp = ((double *) *p_argv)[0];
if (fparg_count < NUM_FPR_ARG_REGISTERS)
*fpr_base++ = double_tmp;
else
*(double *) next_arg = double_tmp;
next_arg += 2;
fparg_count++;
double_tmp = ((double *)*p_argv)[1];
if (fparg_count >= NUM_FPR_ARG_REGISTERS)
*(double *)next_arg = double_tmp;
else
double_tmp = ((double *) *p_argv)[1];
if (fparg_count < NUM_FPR_ARG_REGISTERS)
*fpr_base++ = double_tmp;
else
*(double *) next_arg = double_tmp;
next_arg += 2;
fparg_count++;
#endif
FFI_ASSERT(flags & FLAG_FP_ARGUMENTS);
break;
#endif
case FFI_TYPE_UINT64:
case FFI_TYPE_SINT64:
*(long long *)next_arg = *(long long *)*p_argv;
next_arg+=2;
#ifdef POWERPC64
gprvalue = *(long long *) *p_argv;
goto putgpr;
#else
*(long long *) next_arg = *(long long *) *p_argv;
next_arg += 2;
#endif
break;
case FFI_TYPE_POINTER:
gprvalue = *(unsigned long *) *p_argv;
goto putgpr;
case FFI_TYPE_UINT8:
gprvalue = *(unsigned char *)*p_argv;
gprvalue = *(unsigned char *) *p_argv;
goto putgpr;
case FFI_TYPE_SINT8:
gprvalue = *(signed char *)*p_argv;
gprvalue = *(signed char *) *p_argv;
goto putgpr;
case FFI_TYPE_UINT16:
gprvalue = *(unsigned short *)*p_argv;
gprvalue = *(unsigned short *) *p_argv;
goto putgpr;
case FFI_TYPE_SINT16:
gprvalue = *(signed short *)*p_argv;
gprvalue = *(signed short *) *p_argv;
goto putgpr;
case FFI_TYPE_STRUCT:
#ifdef POWERPC64
dest_cpy = (char *) next_arg;
size_al = (*ptr)->size;
if ((*ptr)->elements[0]->type == 3)
size_al = ALIGN((*ptr)->size, 8);
if (size_al < 3 && ecif->cif->abi == FFI_DARWIN)
dest_cpy += 4 - size_al;
memcpy ((char *) dest_cpy, (char *) *p_argv, size_al);
next_arg += (size_al + 7) / 8;
#else
dest_cpy = (char *) next_arg;
/* Structures that match the basic modes (QI 1 byte, HI 2 bytes,
@@ -195,22 +226,24 @@ void ffi_prep_args(extended_cif *ecif, unsigned *const stack)
Structures with 3 byte in size are padded upwards. */
size_al = (*ptr)->size;
/* If the first member of the struct is a double, then align
the struct to double-word.
Type 3 is defined in include/ffi.h. #define FFI_TYPE_DOUBLE 3. */
if ((*ptr)->elements[0]->type == 3)
the struct to double-word. */
if ((*ptr)->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN((*ptr)->size, 8);
if (size_al < 3 && ecif->cif->abi == FFI_DARWIN)
dest_cpy += 4 - size_al;
memcpy((char *)dest_cpy, (char *)*p_argv, size_al);
memcpy((char *) dest_cpy, (char *) *p_argv, size_al);
next_arg += (size_al + 3) / 4;
#endif
break;
case FFI_TYPE_INT:
case FFI_TYPE_UINT32:
case FFI_TYPE_SINT32:
case FFI_TYPE_POINTER:
gprvalue = *(unsigned *)*p_argv;
gprvalue = *(signed int *) *p_argv;
goto putgpr;
case FFI_TYPE_UINT32:
gprvalue = *(unsigned int *) *p_argv;
putgpr:
*next_arg++ = gprvalue;
break;
@@ -324,6 +357,9 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
case FFI_TYPE_UINT64:
case FFI_TYPE_SINT64:
#ifdef POWERPC64
case FFI_TYPE_POINTER:
#endif
flags |= FLAG_RETURNS_64BITS;
break;
@@ -387,11 +423,14 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
case FFI_TYPE_STRUCT:
size_al = (*ptr)->size;
/* If the first member of the struct is a double, then align
the struct to double-word.
Type 3 is defined in include/ffi.h. #define FFI_TYPE_DOUBLE 3. */
if ((*ptr)->elements[0]->type == 3)
the struct to double-word. */
if ((*ptr)->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN((*ptr)->size, 8);
#ifdef POWERPC64
intarg_count += (size_al + 7) / 8;
#else
intarg_count += (size_al + 3) / 4;
#endif
break;
default:
@@ -410,8 +449,13 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
bytes += NUM_FPR_ARG_REGISTERS * sizeof(double);
/* Stack space. */
#ifdef POWERPC64
if ((intarg_count + fparg_count) > NUM_GPR_ARG_REGISTERS)
bytes += (intarg_count + fparg_count) * sizeof(long);
#else
if ((intarg_count + 2 * fparg_count) > NUM_GPR_ARG_REGISTERS)
bytes += (intarg_count + 2 * fparg_count) * sizeof(long);
#endif
else
bytes += NUM_GPR_ARG_REGISTERS * sizeof(long);
@@ -424,9 +468,9 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
return FFI_OK;
}
extern void ffi_call_AIX(extended_cif *, unsigned, unsigned, unsigned *,
extern void ffi_call_AIX(extended_cif *, long, unsigned, unsigned *,
void (*fn)(void), void (*fn2)(void));
extern void ffi_call_DARWIN(extended_cif *, unsigned, unsigned, unsigned *,
extern void ffi_call_DARWIN(extended_cif *, long, unsigned, unsigned *,
void (*fn)(void), void (*fn2)(void));
void ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)
@@ -450,11 +494,11 @@ void ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue)
switch (cif->abi)
{
case FFI_AIX:
ffi_call_AIX(&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_call_AIX(&ecif, -(long)cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_prep_args);
break;
case FFI_DARWIN:
ffi_call_DARWIN(&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_call_DARWIN(&ecif, -(long)cif->bytes, cif->flags, ecif.rvalue, fn,
ffi_prep_args);
break;
default:
@@ -645,26 +689,19 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
void ** avalue;
ffi_type ** arg_types;
long i, avn;
long nf; /* number of floating registers already used. */
long ng; /* number of general registers already used. */
ffi_cif * cif;
double temp;
ffi_dblfl * end_pfr = pfr + NUM_FPR_ARG_REGISTERS;
unsigned size_al;
union ldu temp_ld;
cif = closure->cif;
avalue = alloca(cif->nargs * sizeof(void *));
nf = 0;
ng = 0;
/* Copy the caller's structure return value address so that the closure
returns the data directly to the caller. */
if (cif->rtype->type == FFI_TYPE_STRUCT)
{
rvalue = (void *) *pgr;
pgr++;
ng++;
}
i = 0;
@@ -678,58 +715,82 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
{
case FFI_TYPE_SINT8:
case FFI_TYPE_UINT8:
#ifdef POWERPC64
avalue[i] = (char *) pgr + 7;
#else
avalue[i] = (char *) pgr + 3;
ng++;
#endif
pgr++;
break;
case FFI_TYPE_SINT16:
case FFI_TYPE_UINT16:
#ifdef POWERPC64
avalue[i] = (char *) pgr + 6;
#else
avalue[i] = (char *) pgr + 2;
ng++;
#endif
pgr++;
break;
case FFI_TYPE_SINT32:
case FFI_TYPE_UINT32:
#ifdef POWERPC64
avalue[i] = (char *) pgr + 4;
#else
case FFI_TYPE_POINTER:
avalue[i] = pgr;
ng++;
#endif
pgr++;
break;
case FFI_TYPE_STRUCT:
#ifdef POWERPC64
size_al = arg_types[i]->size;
if (arg_types[i]->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN (arg_types[i]->size, 8);
if (size_al < 3 && cif->abi == FFI_DARWIN)
avalue[i] = (void *) pgr + 8 - size_al;
else
avalue[i] = (void *) pgr;
pgr += (size_al + 7) / 8;
#else
/* Structures that match the basic modes (QI 1 byte, HI 2 bytes,
SI 4 bytes) are aligned as if they were those modes. */
size_al = arg_types[i]->size;
/* If the first member of the struct is a double, then align
the struct to double-word.
Type 3 is defined in include/ffi.h. #define FFI_TYPE_DOUBLE 3. */
if (arg_types[i]->elements[0]->type == 3)
the struct to double-word. */
if (arg_types[i]->elements[0]->type == FFI_TYPE_DOUBLE)
size_al = ALIGN(arg_types[i]->size, 8);
if (size_al < 3 && cif->abi == FFI_DARWIN)
avalue[i] = (void*) pgr + 4 - size_al;
else
avalue[i] = (void*) pgr;
ng += (size_al + 3) / 4;
pgr += (size_al + 3) / 4;
#endif
break;
case FFI_TYPE_SINT64:
case FFI_TYPE_UINT64:
#ifdef POWERPC64
case FFI_TYPE_POINTER:
avalue[i] = pgr;
pgr++;
break;
#else
/* Long long ints are passed in two gpr's. */
avalue[i] = pgr;
ng += 2;
pgr += 2;
break;
#endif
case FFI_TYPE_FLOAT:
/* A float value consumes a GPR.
There are 13 64bit floating point registers. */
if (nf < NUM_FPR_ARG_REGISTERS)
if (pfr < end_pfr)
{
temp = pfr->d;
pfr->f = (float)temp;
double temp = pfr->d;
pfr->f = (float) temp;
avalue[i] = pfr;
pfr++;
}
@@ -737,15 +798,13 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
{
avalue[i] = pgr;
}
nf++;
ng++;
pgr++;
break;
case FFI_TYPE_DOUBLE:
/* A double value consumes two GPRs.
There are 13 64bit floating point registers. */
if (nf < NUM_FPR_ARG_REGISTERS)
if (pfr < end_pfr)
{
avalue[i] = pfr;
pfr++;
@@ -754,17 +813,36 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
{
avalue[i] = pgr;
}
nf++;
ng += 2;
#ifdef POWERPC64
pgr++;
#else
pgr += 2;
#endif
break;
#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE
case FFI_TYPE_LONGDOUBLE:
#ifdef POWERPC64
if (pfr + 1 < end_pfr)
{
avalue[i] = pfr;
pfr += 2;
}
else
{
if (pfr < end_pfr)
{
*pgr = *(unsigned long *) pfr;
pfr++;
}
avalue[i] = pgr;
}
pgr += 2;
#else /* POWERPC64 */
/* A long double value consumes four GPRs and two FPRs.
There are 13 64bit floating point registers. */
if (nf < NUM_FPR_ARG_REGISTERS - 1)
if (pfr + 1 < end_pfr)
{
avalue[i] = pfr;
pfr += 2;
@@ -772,19 +850,20 @@ int ffi_closure_helper_DARWIN (ffi_closure* closure, void * rvalue,
/* Here we have the situation where one part of the long double
is stored in fpr13 and the other part is already on the stack.
We use a union to pass the long double to avalue[i]. */
else if (nf == NUM_FPR_ARG_REGISTERS - 1)
else if (pfr + 1 == end_pfr)
{
union ldu temp_ld;
memcpy (&temp_ld.lb[0], pfr, sizeof(ldbits));
memcpy (&temp_ld.lb[1], pgr + 2, sizeof(ldbits));
avalue[i] = &temp_ld.ld;
pfr++;
}
else
{
avalue[i] = pgr;
}
nf += 2;
ng += 4;
pgr += 4;
#endif /* POWERPC64 */
break;
#endif
default:

6
src/powerpc/ffitarget.h
View File

@@ -30,7 +30,11 @@
/* ---- System specific configurations ----------------------------------- */
#if defined (POWERPC) && defined (__powerpc64__)
#if defined (POWERPC) && defined (__powerpc64__) /* linux64 */
#define POWERPC64
#elif defined (POWERPC_DARWIN) && defined (__ppc64__) /* Darwin */
#define POWERPC64
#elif defined (POWERPC_AIX) && defined (__64BIT__) /* AIX64 */
#define POWERPC64
#endif