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aarch64: Simplify AARCH64_STACK_ALIGN

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The iOS abi doesn't require padding between arguments, but
that's not what AARCH64_STACK_ALIGN meant.  The hardware will
in fact trap if the SP register is not 16 byte aligned.
This commit is contained in:
Richard Henderson
2014-10-21 13:30:40 -04:00
committed by Richard Henderson
parent b5f147d847
commit 77c4cddca6
1 changed files with 1 additions and 9 deletions
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10
src/aarch64/ffi.c
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@@ -35,13 +35,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
# define FFI_TYPE_LONGDOUBLE 4 # define FFI_TYPE_LONGDOUBLE 4
#endif #endif
/* Stack alignment requirement in bytes */
#if defined (__APPLE__)
#define AARCH64_STACK_ALIGN 1
#else
#define AARCH64_STACK_ALIGN 16
#endif
#define N_X_ARG_REG 8 #define N_X_ARG_REG 8
#define N_V_ARG_REG 8 #define N_V_ARG_REG 8
@@ -799,8 +792,7 @@ ffi_status
ffi_prep_cif_machdep (ffi_cif *cif) ffi_prep_cif_machdep (ffi_cif *cif)
{ {
/* Round the stack up to a multiple of the stack alignment requirement. */ /* Round the stack up to a multiple of the stack alignment requirement. */
cif->bytes = cif->bytes = ALIGN(cif->bytes, 16);
(cif->bytes + (AARCH64_STACK_ALIGN - 1)) & ~ (AARCH64_STACK_ALIGN - 1);
/* Initialize our flags. We are interested if this CIF will touch a /* Initialize our flags. We are interested if this CIF will touch a
vector register, if so we will enable context save and load to vector register, if so we will enable context save and load to