TILE-Gx/TILEPro support
This commit is contained in:
Anthony Green
360
src/tile/tile.S
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360
src/tile/tile.S
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/* -----------------------------------------------------------------------
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tile.S - Copyright (c) 2011 Tilera Corp.
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Tilera TILEPro and TILE-Gx Foreign Function Interface
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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``Software''), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be included
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in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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----------------------------------------------------------------------- */
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#define LIBFFI_ASM
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#include <fficonfig.h>
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#include <ffi.h>
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/* Number of bytes in a register. */
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#define REG_SIZE FFI_SIZEOF_ARG
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/* Number of bytes in stack linkage area for backtracing.
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A note about the ABI: on entry to a procedure, sp points to a stack
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slot where it must spill the return address if it's not a leaf.
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REG_SIZE bytes beyond that is a slot owned by the caller which
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contains the sp value that the caller had when it was originally
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entered (i.e. the caller's frame pointer). */
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#define LINKAGE_SIZE (2 * REG_SIZE)
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/* The first 10 registers are used to pass arguments and return values. */
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#define NUM_ARG_REGS 10
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#ifdef __tilegx__
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#define SW st
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#define LW ld
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#define BGZT bgtzt
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#else
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#define SW sw
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#define LW lw
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#define BGZT bgzt
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#endif
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/* void ffi_call_tile (int_reg_t reg_args[NUM_ARG_REGS],
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const int_reg_t *stack_args,
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unsigned long stack_args_bytes,
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void (*fnaddr)(void));
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On entry, REG_ARGS contain the outgoing register values,
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and STACK_ARGS containts STACK_ARG_BYTES of additional values
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to be passed on the stack. If STACK_ARG_BYTES is zero, then
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STACK_ARGS is ignored.
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When the invoked function returns, the values of r0-r9 are
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blindly stored back into REG_ARGS for the caller to examine. */
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.section .text.ffi_call_tile, "ax", @progbits
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.align 8
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.globl ffi_call_tile
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FFI_HIDDEN(ffi_call_tile)
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ffi_call_tile:
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/* Incoming arguments. */
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#define REG_ARGS r0
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#define INCOMING_STACK_ARGS r1
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#define STACK_ARG_BYTES r2
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#define ORIG_FNADDR r3
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/* Temporary values. */
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#define FRAME_SIZE r10
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#define TMP r11
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#define TMP2 r12
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#define OUTGOING_STACK_ARGS r13
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#define REG_ADDR_PTR r14
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#define RETURN_REG_ADDR r15
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#define FNADDR r16
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.cfi_startproc
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{
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/* Save return address. */
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SW sp, lr
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.cfi_offset lr, 0
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/* Prepare to spill incoming r52. */
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addi TMP, sp, -REG_SIZE
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/* Increase frame size to have room to spill r52 and REG_ARGS.
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The +7 is to round up mod 8. */
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addi FRAME_SIZE, STACK_ARG_BYTES, \
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REG_SIZE + REG_SIZE + LINKAGE_SIZE + 7
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}
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{
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/* Round stack frame size to a multiple of 8 to satisfy ABI. */
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andi FRAME_SIZE, FRAME_SIZE, -8
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/* Compute where to spill REG_ARGS value. */
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addi TMP2, sp, -(REG_SIZE * 2)
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}
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{
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/* Spill incoming r52. */
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SW TMP, r52
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.cfi_offset r52, -REG_SIZE
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/* Set up our frame pointer. */
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move r52, sp
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.cfi_def_cfa_register r52
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/* Push stack frame. */
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sub sp, sp, FRAME_SIZE
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}
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{
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/* Prepare to set up stack linkage. */
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addi TMP, sp, REG_SIZE
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/* Prepare to memcpy stack args. */
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addi OUTGOING_STACK_ARGS, sp, LINKAGE_SIZE
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/* Save REG_ARGS which we will need after we call the subroutine. */
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SW TMP2, REG_ARGS
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}
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{
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/* Set up linkage info to hold incoming stack pointer. */
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SW TMP, r52
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}
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{
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/* Skip stack args memcpy if we don't have any stack args (common). */
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blezt STACK_ARG_BYTES, .Ldone_stack_args_memcpy
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}
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.Lmemcpy_stack_args:
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{
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/* Load incoming argument from stack_args. */
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LW TMP, INCOMING_STACK_ARGS
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addi INCOMING_STACK_ARGS, INCOMING_STACK_ARGS, REG_SIZE
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}
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{
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/* Store stack argument into outgoing stack argument area. */
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SW OUTGOING_STACK_ARGS, TMP
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addi OUTGOING_STACK_ARGS, OUTGOING_STACK_ARGS, REG_SIZE
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addi STACK_ARG_BYTES, STACK_ARG_BYTES, -REG_SIZE
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}
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{
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BGZT STACK_ARG_BYTES, .Lmemcpy_stack_args
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}
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.Ldone_stack_args_memcpy:
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{
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/* Copy aside ORIG_FNADDR so we can overwrite its register. */
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move FNADDR, ORIG_FNADDR
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/* Prepare to load argument registers. */
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addi REG_ADDR_PTR, r0, REG_SIZE
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/* Load outgoing r0. */
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LW r0, r0
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}
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/* Load up argument registers from the REG_ARGS array. */
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#define LOAD_REG(REG, PTR) \
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{ \
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LW REG, PTR ; \
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addi PTR, PTR, REG_SIZE \
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}
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LOAD_REG(r1, REG_ADDR_PTR)
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LOAD_REG(r2, REG_ADDR_PTR)
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LOAD_REG(r3, REG_ADDR_PTR)
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LOAD_REG(r4, REG_ADDR_PTR)
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LOAD_REG(r5, REG_ADDR_PTR)
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LOAD_REG(r6, REG_ADDR_PTR)
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LOAD_REG(r7, REG_ADDR_PTR)
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LOAD_REG(r8, REG_ADDR_PTR)
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LOAD_REG(r9, REG_ADDR_PTR)
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{
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/* Call the subroutine. */
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jalr FNADDR
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}
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{
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/* Restore original lr. */
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LW lr, r52
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/* Prepare to recover ARGS, which we spilled earlier. */
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addi TMP, r52, -(2 * REG_SIZE)
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}
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{
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/* Restore ARGS, so we can fill it in with the return regs r0-r9. */
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LW RETURN_REG_ADDR, TMP
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/* Prepare to restore original r52. */
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addi TMP, r52, -REG_SIZE
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}
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{
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/* Pop stack frame. */
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move sp, r52
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/* Restore original r52. */
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LW r52, TMP
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}
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#define STORE_REG(REG, PTR) \
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{ \
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SW PTR, REG ; \
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addi PTR, PTR, REG_SIZE \
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}
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/* Return all register values by reference. */
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STORE_REG(r0, RETURN_REG_ADDR)
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STORE_REG(r1, RETURN_REG_ADDR)
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STORE_REG(r2, RETURN_REG_ADDR)
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STORE_REG(r3, RETURN_REG_ADDR)
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STORE_REG(r4, RETURN_REG_ADDR)
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STORE_REG(r5, RETURN_REG_ADDR)
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STORE_REG(r6, RETURN_REG_ADDR)
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STORE_REG(r7, RETURN_REG_ADDR)
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STORE_REG(r8, RETURN_REG_ADDR)
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STORE_REG(r9, RETURN_REG_ADDR)
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{
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jrp lr
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}
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.cfi_endproc
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.size ffi_call_tile, .-ffi_call_tile
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/* ffi_closure_tile(...)
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On entry, lr points to the closure plus 8 bytes, and r10
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contains the actual return address.
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This function simply dumps all register parameters into a stack array
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and passes the closure, the registers array, and the stack arguments
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to C code that does all of the actual closure processing. */
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.section .text.ffi_closure_tile, "ax", @progbits
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.align 8
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.globl ffi_closure_tile
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FFI_HIDDEN(ffi_closure_tile)
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.cfi_startproc
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/* Room to spill all NUM_ARG_REGS incoming registers, plus frame linkage. */
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#define CLOSURE_FRAME_SIZE (((NUM_ARG_REGS * REG_SIZE * 2 + LINKAGE_SIZE) + 7) & -8)
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ffi_closure_tile:
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{
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#ifdef __tilegx__
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st sp, lr
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.cfi_offset lr, 0
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#else
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/* Save return address (in r10 due to closure stub wrapper). */
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SW sp, r10
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.cfi_return_column r10
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.cfi_offset r10, 0
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#endif
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/* Compute address for stack frame linkage. */
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addli r10, sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
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}
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{
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/* Save incoming stack pointer in linkage area. */
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SW r10, sp
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.cfi_offset sp, -(CLOSURE_FRAME_SIZE - REG_SIZE)
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/* Push a new stack frame. */
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addli sp, sp, -CLOSURE_FRAME_SIZE
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.cfi_adjust_cfa_offset CLOSURE_FRAME_SIZE
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}
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{
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/* Create pointer to where to start spilling registers. */
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addi r10, sp, LINKAGE_SIZE
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}
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/* Spill all the incoming registers. */
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STORE_REG(r0, r10)
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STORE_REG(r1, r10)
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STORE_REG(r2, r10)
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STORE_REG(r3, r10)
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STORE_REG(r4, r10)
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STORE_REG(r5, r10)
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STORE_REG(r6, r10)
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STORE_REG(r7, r10)
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STORE_REG(r8, r10)
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{
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/* Save r9. */
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SW r10, r9
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#ifdef __tilegx__
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/* Pointer to closure is passed in r11. */
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move r0, r11
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#else
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/* Compute pointer to the closure object. Because the closure
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starts with a "jal ffi_closure_tile", we can just take the
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value of lr (a phony return address pointing into the closure)
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and subtract 8. */
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addi r0, lr, -8
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#endif
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/* Compute a pointer to the register arguments we just spilled. */
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addi r1, sp, LINKAGE_SIZE
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}
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{
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/* Compute a pointer to the extra stack arguments (if any). */
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addli r2, sp, CLOSURE_FRAME_SIZE + LINKAGE_SIZE
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/* Call C code to deal with all of the grotty details. */
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jal ffi_closure_tile_inner
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}
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{
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addli r10, sp, CLOSURE_FRAME_SIZE
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}
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{
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/* Restore the return address. */
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LW lr, r10
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/* Compute pointer to registers array. */
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addli r10, sp, LINKAGE_SIZE + (NUM_ARG_REGS * REG_SIZE)
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}
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/* Return all the register values, which C code may have set. */
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LOAD_REG(r0, r10)
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LOAD_REG(r1, r10)
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LOAD_REG(r2, r10)
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LOAD_REG(r3, r10)
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LOAD_REG(r4, r10)
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LOAD_REG(r5, r10)
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LOAD_REG(r6, r10)
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LOAD_REG(r7, r10)
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LOAD_REG(r8, r10)
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LOAD_REG(r9, r10)
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{
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/* Pop the frame. */
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addli sp, sp, CLOSURE_FRAME_SIZE
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jrp lr
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}
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.cfi_endproc
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.size ffi_closure_tile, . - ffi_closure_tile
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/* What follows are code template instructions that get copied to the
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closure trampoline by ffi_prep_closure_loc. The zeroed operands
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get replaced by their proper values at runtime. */
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.section .text.ffi_template_tramp_tile, "ax", @progbits
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.align 8
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.globl ffi_template_tramp_tile
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FFI_HIDDEN(ffi_template_tramp_tile)
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ffi_template_tramp_tile:
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#ifdef __tilegx__
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{
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moveli r11, 0 /* backpatched to address of containing closure. */
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moveli r10, 0 /* backpatched to ffi_closure_tile. */
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}
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/* Note: the following bundle gets generated multiple times
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depending on the pointer value (esp. useful for -m32 mode). */
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{ shl16insli r11, r11, 0 ; shl16insli r10, r10, 0 }
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{ info 2+8 /* for backtracer: -> pc in lr, frame size 0 */ ; jr r10 }
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#else
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/* 'jal .' yields a PC-relative offset of zero so we can OR in the
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right offset at runtime. */
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{ move r10, lr ; jal . /* ffi_closure_tile */ }
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#endif
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.size ffi_template_tramp_tile, . - ffi_template_tramp_tile
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